Track impedance (that is, the end-to-end impedance of a length of track - not the same thing as transfer impedance Z_T or characteristic impedance Z₀) is dominated by inductance at frequencies higher than a few kHz. The self-inductance of a PCB track is primarily a function of its length, and only secondarily a function of its width. A good rule of thumb for the self-inductance of wires or tracks is 25nH per inch or 10nH per cm.

But this assumes that the conductor is separated from the path which carries its return current. A large part of EMC design involves creating a geometry which positions go and return currents as close as possible. Running signal and ground return tracks close together - so that the same current flows in opposite directions - will reduce the overall effective circuit inductance by a factor equivalent to the mutual inductance. If the mutual inductance was equal to the self inductance of each half, the overall loop inductance would be zero: the implication of this is that the go and return tracks would be co-located, which is of course impossible.

L_eff          =          2(L - M)

This effect is critical to understanding PCB track routing at radio frequencies. Knowledge of the ground current return path is essential. Given this, keeping the signal and ground paths adjacent along their length – and therefore maximizing their mutual inductance – will ensure not only minimum coupling with the magnetic fields around the PCB, but also minimum impedance of the return path and therefore minimum noise voltage developed along it. This will keep down the “noisiness” of the whole board, which is mostly responsible for common mode emissions, and will also improve its immunity to external interference.

The gridded or meshed ground

A simple way to provide several parallel ground tracks is to form the ground layout in a grid or mesh structure. This maximizes the number of different paths that ground return current can take and therefore minimizes the ground inductance for any given signal route.

Such a structure is well suited to low speed digital or analogue layout with many packages on a double sided board, when individual signal/return paths are too complex to define easily. A wide ground track is preferred to narrow for minimum inductance, but even a narrow track linking two widely-separated points is better than none. The grid pattern doesn't have to be regular - the pattern can be provided by in-filling open areas of the board with copper, as long as the useful return current paths that these filled areas provide have been identified. Extra copper that doesn't provide a current path is redundant for EMC, although not useless in the mechanical structure of the board, as it may be needed to balance the overall weight of copper on each layer, to prevent the board from warping.

The grid layout is best achieved by putting the grid structure down first, before the signal or power tracks are laid out. Critical signal tracks can then be laid close to the ground tracks to keep the overall loop area small. With double-sided boards, the opposite sides can carry ground tracks in orthogonal orientations, with via connections at each intersection. As an extra precaution, dedicated ground tracks can be laid alongside offensive tracks.

Identifying critical tracks

From this description, you can see that it is important to know what tracks are critical and need careful routing, and what are not. This is a prime function of the interface between the circuit designer and the layout designer - if they are the same person, the interface is simplified! Because EMC is about both emissions and immunity, critical tracks can be said to be those which:

carry high frequency or high di/dt currents - a simple model for radiated emissions from tracks of a given geometry will tell you what is "high" in context

carry high dV/dt signals, such as the switching nodes of power converters - the threat from these tracks is due to mutual capacitance with other nodes, although they may also carry significant current

carry sensitive signals which can be affected by induced transients or radio frequency interference; processor reset lines, or microvolt-level analogue inputs, are examples of these.

It is good practice to identify these nodes in the circuit schematic, so that when converted to a PCB layout, they can receive special attention.

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